The discharge of this moment quantity of CHIPS 2020 coincides with the fiftieth anniversary of Moore’s legislation, a severe yr marked via the top of the nanometer roadmap and by means of a considerably diminished annual upward thrust in chip functionality. even as, we're witnessing an information explosion within the net, that is eating forty% extra electricity each year, resulting in fears of a big blackout of the web via 2020.
The messages of the 1st CHIPS 2020, released in 2012, involved the belief of quantum steps for bettering the strength potency of all chip capabilities. With this moment quantity, we evaluation those messages and magnify upon the main promising instructions: ultra-low-voltage electronics, nanoscale monolithic 3D integration, relevant-data, mind- and human-vision-inspired processing, and effort harvesting for chip autonomy. The workforce of authors, enlarged through extra international leaders in low-power, monolithic 3D, video, and Silicon brains, offers new vistas in nanoelectronics, promising Moore-like exponential progress sustainable via to the 2030s.
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Extra resources for Chips 2020, Volume 2: New Vistas in Nanoelectronics (The Frontiers Collection)
Sample text
Hoefflinger losing out on the total energy bill. We introduced a throughput FOM, which checks the ratio of operations/s divided by the energy/operation. This assessment has shown that differential transmission-gate logic beats standard-cell logic, especially for low-voltage, energy-efficient processing, in energy-efficiency by an order-ofmagnitude and in the throughput FOM by more than an order-of-magnitude. A breakthrough in vertical, 3D transistor integration on-chip is the series-connected-poly-Si-transistor towers for ultra-high-density NAND Flash memories, which reached 128 Gb/chip production levels in 2013.
This indicates that the low-voltage operation is effective to get higher MOPS/mW in digital signal- or image-processing applications. It has been pointed out that a dedicated-processor solution provides 1000-times higher performance compared to the microprocessor solution. This is due to the CPU-memory bottleneck [14]. This suggests that the combination of the low-voltage CPU and a dedicated-processing element such as CMA or off-loader enables much better performance/power solutions. 3 Low-Power Non-volatile Memories and Switches In present-day electronics and IT equipment, many types of memories are used in each hierarchy.
The pie chart shows the components of energy and leakage at the MEP. 2 Energy-efficient multipliers 2000–2020 Ref. 33 2008 [15] 2012 [10] 2014 [16] a 40 MOP/s Power Energy/Op. 21 15-cycles pipeline 800 nm with 100 nm T-gate transistors b As we shall see in the following comparisons, these FOM’s on tested multipliers and adders are the highest, reported by the spring of 2014, to our knowledge. Previously in [1], we have selected multipliers as the key elements for logic operations because their complexity normally rises with n2, the square of their word lengths n and because they determine the speed, measured in operations/s.